Lecture #10 -- Exam #1 Review
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Administrivia
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* Hand out solutions to HW #1
* Solution to HW #2 will be available from Ju during TA hours on
  Monday, or from my assistant Amy Levin on Monday.
* Hand out example exam and solutions:
  Note that previous exam (Spring 05) was open book but this one is not.
  Also note that previous exam was a bit too short and easy.

Basic rules
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* Open "Appendix A.10" -- we will supply you with a copy.
* One 8.5" x 11" *handwritten* sheet of notes,
  both sides
* No other materials
* Calculator (used in non-programmable mode).
  You cannot use cell phone, computer, etc. as calculator.
  You cannot share calculators.
* No cell phones or other wireless devices anywhere.
* No computers.

How to study
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* Do you understand every homework problem and why?
* Do you understand everything in the chapters we
  read and the lectures notes?
* Study the MIPS ISA - to save time on exam.
* Do additional homework problems.
  ('for more practice' problems have solutions on CD)

What will be covered?
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Lectures #1-7 (P&H Ch 1, 2, 4, plus A.1-A.6, 3.2, 3.6, B.9)
HW's #1 and #2
See schedule on web page.
Lecture notes are also on web page.

Topics
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* Implementation vs. Architecture
* Performance measurement and modelling:
   - CPI
   - execution time
   - execution time equation:
     exe time = instr/program * cycles/instr * seconds/cycle
     [good thing to put on your 8.5" x 11" sheet]
   - clock rate vs. cycle time -- reciprocal
   - weighted averages for computing avg cycles/instr.
   - general hint: use units.
   - speedup: old time / new time
     [good thing to put on your 8.5" x 11" sheet]
   - benchmarking
   - different kinds of averages
   - different classes of instructions
* ISA's:
   - basic instruction types, addressing modes, etc.
   - how ISAs are encoded
   - MIPS ISA and its idiosyncracies
       . loading 32 bit immediate values
       . pesudo vs. real instructions
       . can only address memory using L*/S* instructions
       . register zero is always zero
       . instruction encoding
   - Tradeoffs in ISA design
   - fixed vs. variable length instructions
   - memory addressing:
        . alignment rules
        . big/little endian   [good thing to put on your 8.5" x 11" sheet]
   - word addressing vs. byte addressing
   - limits on size of immediate field in ALUi, branch, jump instructions.
   - exceptions (not much)
* Mapping C/Java programs to an ISA
   - be a human compiler
* Numerical formats:
   - floating point  [good thing to put on your 8.5" x 11" sheet]
   - 2's complement
   - unsigned binary

What kinds of problems might we have? (non-inclusive list)
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* Performance/speedup analysis comparison - like HW problems
* Modifications to MIPS ISA
* Why is something the way it is in MIPS ISA?
* Write MIPS code from C code
* Find bugs in MIPS code
* Find mismatches between MIPS code and C code
* Explain ISA design tradeoff
* Design an ISA
* Design a new addressing mode
* Decode binary value into MIPS instruction, floating point, 2s complement
* Multiple choice: is this implementation or architecture, and why?
* At least one hard/creative problem