Lecture 23 -- I/O, busses/switchfabrics, interrupts/DMA, etc. ========== Supporting materials -------------------- - Modern PC Architecture: Figure 8.11 from pg. 585, P&H 3rd ed - Figure 8.4, pg. 647 from book (structure of a disk), P&H 2nd ed Administrative -------------- - hand out final project What is I/O? ------------ - from/to other devices - Input: keyboards, mice, etc. - Output: display - Input/Output: disk!, network controller! Key characteristics ------------------- - communication of data - flexiblity in configuring computer (by system builder or end user) - desire for multiple chips to control costs (die area and pin count issues) Why does it matter? ------------------- - when was the last time you felt your computer was "slow"? - performance often limited by I/O, not processor: . start-up of computer or applications -- mostly disk I/O . compiling software -- often limited by disk I/O, esp for short source files and low optimization levels . web surfing -- mostly network I/O . 'server' applications -- credit-card transactions, airline systems, ... - device hardware and operating system have biggest impact . e.g. scheduling disk accesses . e.g. zero-copy TCP/IP stacks - but I/O architecture of system matters too . especially important for 3D graphics . also matters for disks and network What is the I/O architecture in a modern PC? -------------------------------------------- * Modern PC Architecture: Figure 8.11 from pg. 585 . North bridge -- high throughput . South bridge -- pin expander * Contrast Intel with AMD architectures . Tension between cost, flexibility, performance, ... * Busses in the machine - "front-side bus" (intel only) - memory bus - USB - PCI/AGP, PCI express - ATA, Serial ATA * Built-in capabilities: - Wireless network (often on chipset) - Sound - Old-style serial, parallel Key points ---------- - I/O benchmarks -- TPC-C for example, WinBench??? - Polling, interrupts, DMA - Throughput vs. latency... Note that taking advantage of high throughput requires lots of transactions Also: Thoughput can be measured as bytes/second *or* transactions/second!! - Interconnect fabric: Bus vs. Network Disks ----- - Figure 8.4 from page 657 of book (2nd ed) - Read/write head... - Seek time of ~ 8.3 msec - How many seeks/second? Networking ---------- - 1Gbit/sec = 100 MBytes/sec --> 30 processor clocks/byte @ 3GHz processor clk Local interconnection networks ------------------------------ - Busses vs. Switch fabrics - PCI vs. PCI Express Busses ------ * Why do you want them? . multiple chips . flexibility by system manufacterer . flexibility by end user - figure 8.9c, pg. 659 - Synchronous vs. asychronous -- is there a clock signal? USB is asychronous - Asynchronous -- figure 8.10 - Bus protocols: . only one 'talker' at once: need to 'acquire' the bus . how to 'arbitrate' on multiple near-simultaneous acquisition attempts? . control signals vs. address signals vs. data signals separate wires or shared wires? - Physical/electrical limitations: maximum bus length! Switch fabrics -------------- - how to route? - blocking or non-blocking? - packet or circuit switched? - if you have one hub, these decisions can be simpler Tradeoffs in interconnect design -------------------------------- * distance vs. speed * bandwidth vs. cost * speed vs. robustness (e.g. synchronous vs. asynchronous) Processor interface ------------------- - memory mapped I/O vs. separate I/O address space? - polling... sucks - interrups -- better, but w/high data xfer rates still slow - DMA -- I/O controller is effectively a separate processor... cache coherence issues. still need IRQ to signal when done. - close interplay between processor's I/O instructions/architecture; overall system I/O architecture; and operating system.